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Intel has recently added “Intel Open FPGA Stack (Intel OFS)” as a solution (a group of hardware such as FPGA boards and MPU running software) to build FPGA as an MPU accelerator (microprocessor). )
“Was announced ( news release ). OFS is an updated and extended version of the “Intel Acceleration Stack” * 1 current solution.
19:08 GMT, Thursday, November 26, 2020
For instance, according to Intel, a Japanese group, the current Acceleration Stack was supposed to use the ‘Intel Programmable Acceleration Card (PAC)’ Intel FPGA board, but OFS is a third-party FPGA board and customers (equipment). It can also be extended to producer-developed FPGA boards (circuits). “It has become a solution that can be used for all developments that accelerate IA (Intel Architecture) MPUs with Intel FPGAs” (Intel).
Moreover, it has become easier to reach the FPGA shell (the portion of the FPGA chip that lacks the internal logic array, such as the external interface, the power supply circuit, and the hard-type macro integrated logic circuit). The interface between the shell and the internal logic series, for example, was modified from Intel’s own bus to the AMBA AXI industry standard. The code was made easier to see and customize when viewing the shell’s source code.
The OFS Early Access program has already started, and the ‘Silicom FPGA SmartNIC N5010’ has been revealed by Israel Silicon as the first of its kind for OFS-enabled third party FPGA boards. The board was co-developed and serves as an Ethernet network interface by Intel and Silicom
It consists of four FPGAs “Stratix 10 DX” and an adapter “Intel Ethernet 800 Series”
Furthermore, Intel’s own FPGA board (Intel PAC) would be OFS compliant. “Intel PAC D5005″Intel PAC D5005″Stratix 10 SX”Stratix 10 SX. FPGA boards equipped with Stratix 10 FPGAs other than SX and FPGA boards equipped with Agilex tend to appear after that.